https://cybertoolchain.io/tools/chipsec New releases and features in CHIPSEC, tracked by The Cyber Toolchain. en Thu, 24 Sep 2026 22:37:42 GMT https://github.com/chipsec/chipsec/releases/tag/2.0.9 https://github.com/chipsec/chipsec/releases/tag/2.0.9 Thu, 24 Sep 2026 22:37:42 GMT CHIPSEC 2.0.9 improves UEFI firmware decode with new section decoders and adds an ACPI NVS fallback for SBREG_BAR discovery.⁠︀︄︇︀︅︉︀︅︀︀︃︀︀︅︅︀︅︊︀︄︆︀︃︄⁠ • Adds an ACPI NVS fallback for SBREG_BAR discovery, broadening platform coverage when the primary P2SB unhide path is unavailable.⁠︀︄︇︀︅︉︀︅︀︀︃︀︀︅︅︀︅︊︀︄︆︀︃︄⁠ • Adds missing UEFI section-type decoders per the PI and UEFI specifications, including correct handling of `EFI_SECTION_DISPOSABLE` (type `0x03`) and fixed DEPEX opcode decoding to PI 1.9. • Improves `uefi decode` output by replacing the set_log_file() redirect pattern with direct file I/O for `.lst` artifacts, eliminating log-file conflicts where NVRAM output clobbered the `.UEFI.lst` handler. • Adds offset and GUID context to UEFI parse warning messages so users can trace which firmware module triggered each warning. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.8 https://github.com/chipsec/chipsec/releases/tag/2.0.8 Thu, 27 Aug 2026 19:13:52 GMT CHIPSEC 2.0.8 adds HOB features, MSR scope checks, is_enabled filtering for controls, and exclusive fixed-address config support. • Adds `is_enabled` field to controls, enabling `filter_enabled` filtering in object lists of controls. • Adds HOB (Hand-Off Block) parsing and inspection features. • Adds MSR scope correctness checks to catch misconfigured MSR definitions. • Configuration helper now supports exclusive fixed addresses for platform register definitions. • Configuration files nested below `cfg/<vendor>/` are now correctly installed during package setup. • Linux kernel driver is now loaded via `modprobe` before searching for the driver file, improving portability of installed builds. • Manual is now installed to a path relative to the install prefix rather than a hardcoded location. • Enhanced logger messaging provides additional detail to aid debugging efforts. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.7 https://github.com/chipsec/chipsec/releases/tag/2.0.7 Thu, 30 Jul 2026 16:42:46 GMT CHIPSEC 2.0.7 adds HOB listing/dumping, Q35/QEMU platform support, and PCH detection in banner output. • Adds `uefi` subcommands to list and dump Hand-Off Blocks (HOBs) from UEFI firmware. • Adds Q35 platform support for QEMU-based testing environments. • Displays detected PCH (Platform Controller Hub) information in the CHIPSEC banner at runtime. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.6 https://github.com/chipsec/chipsec/releases/tag/2.0.6 Wed, 01 Jul 2026 00:57:45 GMT CHIPSEC 2.0.6 restores the 'uefi types' command and adds platform autodetection to 'uefi tables'. • Adds platform autodetection to `chipsec_util uefi tables`, removing the need to specify the platform manually. • Adds a decode dictionary to `ExitCode` in `cfg_checker.py`, making exit code interpretation programmatic. • Expands platform DID matching to HostCtrl DIDs for ADL, ARL, MTL, RPL, and TGLU platforms. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.5 https://github.com/chipsec/chipsec/releases/tag/2.0.5 Tue, 16 Jun 2026 22:57:21 GMT CHIPSEC 2.0.5 adds Intel 440FX (QEMU) support, Meteor Lake DIDs, and expanded cfg_checker validation. • Adds platform configuration for Intel 440FX (QEMU), enabling CHIPSEC analysis in QEMU-based virtual environments. • Adds Meteor Lake (MTL) Device IDs from the datasheet, expanding hardware coverage for MTL platforms. • Adds BAR register/field validity and subcomponent type checks to cfg_checker, strengthening configuration validation. • Splits tcobar and smbus_base into their own configuration files, improving modularity of platform configs. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.5 https://github.com/chipsec/chipsec/releases/tag/2.0.5 Tue, 16 Jun 2026 22:57:21 GMT CHIPSEC 2.0.5 adds Intel 440FX (QEMU) config, Meteor Lake DIDs, and expanded cfg_checker validation. • Adds platform configuration for Intel 440FX (QEMU), enabling CHIPSEC analysis against QEMU-emulated environments. • Adds Meteor Lake (MTL) Device IDs from the datasheet, extending hardware coverage for 14th Gen Intel Core platforms. • Adds BAR register/field validity and subcomponent type checks to cfg_checker, improving configuration correctness validation. • Splits tcobar and smbus_base into their own dedicated configuration files for cleaner platform config organization. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.4 https://github.com/chipsec/chipsec/releases/tag/2.0.4 Fri, 29 May 2026 19:15:06 GMT CHIPSEC 2.0.4 adds execution timestamps to logs and ISO-format datetime in auto-log filenames. • Captures time of execution in CHIPSEC logging output. • Uses ISO 8601 format for datetime in auto-generated log filenames. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/2.0.2 https://github.com/chipsec/chipsec/releases/tag/2.0.2 Tue, 31 Mar 2026 21:31:18 GMT CHIPSEC 2.0.2 adds Lunar Lake platform config, firmware data retrieval, and UEFI Shell support for chipsec2. • Adds initial configuration support for Intel Lunar Lake (LNL) platforms, enabling hardware security analysis on the new architecture. • Adds firmware data retrieval capability for extracting firmware information during platform analysis. • Updates chipsec2 to run in the UEFI Shell environment, expanding pre-OS assessment options. • Updates ASM support for the return thunk introduced in Linux kernel 6.19, maintaining compatibility with modern kernels. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.20 https://github.com/chipsec/chipsec/releases/tag/1.13.20 Fri, 30 Jan 2026 23:46:55 GMT CHIPSEC 1.13.20 adds Brotli (de)compression support for firmware analysis. • Supports Brotli compression and decompression for firmware image parsing. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.18 https://github.com/chipsec/chipsec/releases/tag/1.13.18 Fri, 21 Nov 2025 20:38:57 GMT CHIPSEC 1.13.18 adds a new SGX warning condition and an XML attribute-type validator script. • Adds an additional warning condition to the `sgx_check` module for broader SGX misconfiguration coverage. • Adds `xml_validator` script to verify attribute types in CHIPSEC XML configuration files. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.17 https://github.com/chipsec/chipsec/releases/tag/1.13.17 Thu, 30 Oct 2025 23:06:42 GMT CHIPSEC 1.13.17 adds confirmation input during dependency installation • Adds confirmation input to dependency installation Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.16 https://github.com/chipsec/chipsec/releases/tag/1.13.16 Fri, 05 Sep 2025 07:10:06 GMT CHIPSEC 1.13.16 lets access_uefispec accept both hex and base-10 formatted attribute inputs. • Supports both hexadecimal and base-10 formatted attribute input in the `access_uefispec` module, removing the need to pre-convert values before passing them. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.15 https://github.com/chipsec/chipsec/releases/tag/1.13.15 Fri, 01 Aug 2025 12:49:38 GMT CHIPSEC 1.13.15 adds TPM2 support, CML PCH strap lock testing, and more configurable UEFI variable modification checks. • Adds TPM2 support for firmware security analysis. • Adds strap lock test support for Comet Lake (CML) PCH platforms. • Makes the UEFI variable modification test more configurable. • Extends `reg.is_defined` to check BAR when evaluating MMIO/IOBAR registers. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.13 https://github.com/chipsec/chipsec/releases/tag/1.13.13 Thu, 29 May 2025 00:09:01 GMT CHIPSEC 1.13.13 revamps HAL compression with new ZLIB and GZIP support and improved LZMA handling. • Adds ZLIB and GZIP compression support to the HAL compression layer. • Improves LZMA compression handling in the HAL compression layer. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.12 https://github.com/chipsec/chipsec/releases/tag/1.13.12 Thu, 01 May 2025 15:03:32 GMT CHIPSEC 1.13.12 adds EFI compressed data validation and an env var for brute-force EFI module scanning. • Adds validation of EFI compressed data before attempting Tiano/UEFI decompression, preventing unsafe decompression of malformed firmware blobs. • Adds an environment variable to enable brute-force EFI module scanning at the HAL layer, unlocking deeper firmware analysis when standard enumeration falls short. • Automatically detects the running kernel version to locate the correct script for signing the CHIPSEC driver, simplifying secure-boot-enabled deployments. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.11 https://github.com/chipsec/chipsec/releases/tag/1.13.11 Wed, 26 Mar 2025 22:04:54 GMT CHIPSEC 1.13.11 adds MC1 registers for Raptor Lake and an Arch Linux image. • Adds MC1 registers to the Raptor Lake (RPL) platform definition, expanding hardware register coverage for that CPU family. • Adds Arch Linux Docker image generation for CHIPSEC, with reduced image size. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.10 https://github.com/chipsec/chipsec/releases/tag/1.13.10 Wed, 26 Feb 2025 23:44:21 GMT CHIPSEC 1.13.10 adds MC1 register check to remap, new module archiving status, metadata tags, and dynamic log filenames. • Adds MC1 register check to the remap module for broader memory remapping validation. • Adds archiving status tracking to the framework for test modules. • Adds metadata tags to modules and removes the MTAG prefix from module tags. • Changes default logger file name to include the entry name and timestamp (`entry-yearMonDay-Time.log`). • Adds Windows Server 2025 to officially supported versions. • Changes sgx_check module result to 'information' when CPU is a sample part, rather than a pass/fail verdict. Breaking changes: • The MTAG prefix is removed from module tags; scripts or tooling that filter or match tags using the MTAG prefix will no longer find matches. • The default logger file name format has changed to `entry-yearMonDay-Time.log`; any automation that relies on the previous default log file name pattern will need to be updated. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.9 https://github.com/chipsec/chipsec/releases/tag/1.13.9 Wed, 29 Jan 2025 20:24:46 GMT CHIPSEC 1.13.9 adds PCH C621A platform support and improves replay helper error reporting. • Adds PCH C621A to the pch_c260 config file, enabling hardware security analysis on that platform. • Adds informative error messages when required data is missing during replay helper sessions. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.8 https://github.com/chipsec/chipsec/releases/tag/1.13.8 Wed, 11 Dec 2024 18:41:24 GMT CHIPSEC 1.13.8 adds SamplePart detection, statistical SMI enumeration, PCH 700-series support, and a live USB build system. • Adds SamplePart control check to the `debugenabled` module to detect engineering/sample silicon. • Adds CPU sample-part detection to the `sgx_check` module. • Introduces statistical SMI enumeration using standard deviation for more reliable SMI discovery. • Adds live USB automatic build support via `mkosi`. • Adds PCH 700-series Device IDs (DIDs) to the PCH 600-series config, extending platform coverage. • Adds a utility to decode test names and IDs from test output. Breaking changes: • Python minimum requirement raised from 3.7 to 3.8; setups running Python 3.7 will no longer work. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.7 https://github.com/chipsec/chipsec/releases/tag/1.13.7 Wed, 30 Oct 2024 21:06:20 GMT CHIPSEC 1.13.7 adds AMD common modules, improves SMI detection accuracy, and expands EFI module detection. • Adds initial AMD common modules, extending platform coverage to AMD-based systems. • Improves SMI detection accuracy for more reliable System Management Interrupt analysis. • Improves detection of certain EFI modules previously missed during firmware analysis. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.6 https://github.com/chipsec/chipsec/releases/tag/1.13.6 Thu, 26 Sep 2024 21:30:54 GMT CHIPSEC 1.13.6 adds GIL status reporting, module exclusion support, and configurable logger line termination. • Adds GIL (Global Interpreter Lock) status reporting to surface Python GIL state during runs. • Adds `--exclude` module support to options, allowing specific modules to be skipped during a scan. • Adds ability to change line termination of the logger output. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.4 https://github.com/chipsec/chipsec/releases/tag/1.13.4 Tue, 30 Jul 2024 22:48:37 GMT CHIPSEC 1.13.4 adds Meteor Lake SPI support, SMI contention scanning, remap lock bit checks, and expanded Linux physical memory write size. • Adds Meteor Lake SPI support for firmware analysis on MTL platforms. • Adds SMI contention check to the smm_ptr module's scan mode. • Adds remap lock bit condition check to memory remapping security analysis. • Increases Linux maximum physical memory write size from 0xFFFF to 0xFFFFFFFF, enabling larger memory operations. • Adds NVRAM firmware volume padding check for deeper UEFI NVRAM validation. • Adds error message when UEFI compression modules are missing, improving diagnosis of incomplete setups. • Enables ANSI color logging on Windows via the logger 'color' command. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.3 https://github.com/chipsec/chipsec/releases/tag/1.13.3 Fri, 28 Jun 2024 23:38:19 GMT CHIPSEC 1.13.3 adds `get_max_memory_bit_size` to the physical memory HAL and updates TE test download prompts • Adds `get_max_memory_bit_size` to the physical memory (physmem) HAL for querying maximum addressable memory bit sizes • Adds a TE (Tiano Edition) test download prompt to streamline module setup Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.2 https://github.com/chipsec/chipsec/releases/tag/1.13.2 Wed, 29 May 2024 23:18:31 GMT CHIPSEC 1.13.2 adds SMI enumeration to smm_ptr, Meteor Lake support, and new MBox utils. • `smm_ptr` module now supports `SMI enumeration mode` for broader SMI coverage • Adds `Meteor Lake` platform support • New `make_mask` and `set_bits` utility functions in the `mbox` module Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.1 https://github.com/chipsec/chipsec/releases/tag/1.13.1 Thu, 25 Apr 2024 21:52:15 GMT CHIPSEC 1.13.1 adds `default_helper` to util_config and lock fields to xml schema. • `util_config` option section now supports a new `default_helper` key for specifying a helper executable. • XML configuration schema extended with lock-related fields, enabling lock state definitions in config files. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.13.0 https://github.com/chipsec/chipsec/releases/tag/1.13.0 Thu, 28 Mar 2024 20:56:15 GMT Adds `-csv` log option to output results in CSV format. • `Add csv log option and fix value returned after running only one test` • `Enumerate modules in modules folder using '-lm'` Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.12.8 https://github.com/chipsec/chipsec/releases/tag/1.12.8 Thu, 25 Jan 2024 21:31:44 GMT Adds CET module for chipset security telemetry and new verbose PCI device printing. • `Add CET module`: Enables Chipset Error Tracking (CET) support in CHIPSEC Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.12.4 https://github.com/chipsec/chipsec/releases/tag/1.12.4 Thu, 26 Oct 2023 16:14:04 GMT CHIPSEC 1.12.4 adds return codes support to core modules and new test ID generation • Add return codes support to bios_kbrd_buffer, bios_smi, bios_ts modules extending the new error reporting capability Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.12.3 https://github.com/chipsec/chipsec/releases/tag/1.12.3 Fri, 29 Sep 2023 16:38:45 GMT Adds return codes support to numerous fuzzing and VMM tools, enabling scripted error handling. • Adds `return_codes` support to the `vmm.venom` tool • Adds `return_codes` support to the `wsmt` tool • Adds `return_codes` support to the `iofuzz`, `msr_fuzz`, and `pcie_fuzz` tools • Adds `return_codes` support to the `vbox` and `xen` VMM folders in tools • Adds `return_codes` support to the `cpuid_fuzz`, `ept_finder`, and `hypercallfuzz` tools • Adds `return_codes` support to the `sinkhole`, `te`, `rogue_mmio_bar`, and `smm_ptr` tools Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.12.1 https://github.com/chipsec/chipsec/releases/tag/1.12.1 Wed, 30 Aug 2023 22:18:16 GMT Adds PCIe extended capabilities functionality in CHIPSEC 1.12.1 • Add PCIe extended capabilities functionality Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.12.0 https://github.com/chipsec/chipsec/releases/tag/1.12.0 Fri, 28 Jul 2023 22:01:23 GMT CHIPSEC 1.12.0 adds `--skip_config` CLI flag and log output outside LOGPATH • Enables logging to paths outside the default `LOGPATH` directory via updated config parsing Breaking changes: • Configuration files must now include an `<info></info>` block or loading will fail due to modified config loading behavior Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.11.1 https://github.com/chipsec/chipsec/releases/tag/1.11.1 Wed, 28 Jun 2023 18:12:13 GMT Adds -nl flag to disable autologging and support for 600 Series PCH device IDs • Adds `-nl` switch to disable automatic logging output • Adds Device IDs for Intel 600 Series PCH to config • Adds return codes mode option to main and util modules Breaking changes: • The OSXHelper is removed; running `chipsec` on macOS requires using a version before 1.11.0. • If you have custom helpers, they must be placed in `chipsec/helper/<name>/<name>helper.py` and named correctly. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.11.0 https://github.com/chipsec/chipsec/releases/tag/1.11.0 Wed, 31 May 2023 16:40:51 GMT CHIPSEC 1.11.0 adds .run() CLI subcommand, efi_var_enhanced_auth_access check, LZMAF86 decompression, and Intel TXT register definitions • Adds .run() subcommand to `chipsec_main.py` and `chipsec_util.py` to execute modules via a unified interface • Adds flag and check for `efi_var_enhanced_auth_access` in the EFI variable subsystem • Adds support for the `LZMAF86` compression format • Adds Intel TXT register definitions from the SEAM Loader for chipset analysis Breaking changes: • The Python UEFI Shell executable is renamed from `python368.efi` to `python.efi`, breaking paths or scripts referencing the old name • The `CHIPSEC_LOADED_AS_EXE` environment variable support is deprecated and may be removed in future releases • The OSXHelper module and driver are removed; chipsec will no longer work on macOS unless downgraded to v1.10.x Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.10.4 https://github.com/chipsec/chipsec/releases/tag/1.10.4 Thu, 30 Mar 2023 21:34:14 GMT CHIPSEC 1.10.4 adds Elkhart Lake platform configuration support • Add `Elkhart Lake` configuration file to enable support for this Intel processor platform Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.10.3 https://github.com/chipsec/chipsec/releases/tag/1.10.3 Wed, 01 Mar 2023 23:12:59 GMT CHIPSEC 1.10.3 adds `--skip_config` flag and updates Raptor Lake configuration • Adds the `--skip_config` CLI argument to suppress the extended startup banner. • Expands hardware coverage by adding MCHBAR support to the Raptor Lake platform configuration. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.10.1 https://github.com/chipsec/chipsec/releases/tag/1.10.1 Wed, 25 Jan 2023 20:34:15 GMT CHIPSEC 1.10.1 adds rpl config support and decouples main module from logger for cleaner execution. • Adds `rpl` config to enable support for Raptor Lake platforms • Decouples `chipsec_main` from the logger to allow independent control of main module behavior Breaking changes: • Service is deprecated and the configuration file for it is being removed. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.9.0 https://github.com/chipsec/chipsec/releases/tag/1.9.0 Sat, 01 Oct 2022 00:00:12 GMT Chipsec 1.9.0 adds fw bleed vulnerability scanning via `scan_blocked`, new QEMU UEFI VM script, and expanded logging API. • Add `fw_bleed` detection capability to the `scan_blocked` tool in `chipsec/modules/tools/uefi/blockedlist.json` • Add `scripts.qemu_efi` helper script to start a QEMU virtual machine with a UEFI shell • Add `log_hal`, `log_verbose`, and `log_debug` functions to the `logger` module for granular logging control • Add `setlevel` function in `chipsec_main`, `chipsec_util`, `chipset`, and `logger` to programmatically adjust log levels Breaking changes: • The `master` branch has been renamed to `main` Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.8.8 https://github.com/chipsec/chipsec/releases/tag/1.8.8 Sat, 27 Aug 2022 01:13:22 GMT CHIPSEC 1.8.8 adds PCH configuration for 600 series and updates Windows driver support for VS2022. • Adds `8086/pch_6xxP` and `8086/pch_6xxS` to public configurations for 600 series PCH support • Adds VS2022 support for the Windows driver via updates in `drivers/win7/driver.c` Breaking changes: • Python2 is no longer supported and requires using Python3 instead. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.8.6 https://github.com/chipsec/chipsec/releases/tag/1.8.6 Wed, 22 Jun 2022 22:19:36 GMT Adds configuration files for Intel PCH 7/8 series and CML DIDs • Adds `8086/pch_7x` config file to support Intel 7 series Platform Controller Hub • Adds `8086/pch_8x` config file to support Intel 8 series Platform Controller Hub • Adds CML DIDs from the 10th Gen Core Datasheet Vol 1 via the `8086/cml` config file Breaking changes: • Python2 support is removed; Chipsec 1.8.6 requires Python3. • The default branch for source code changes from `master` to `main`. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.8.4 https://github.com/chipsec/chipsec/releases/tag/1.8.4 Wed, 27 Apr 2022 23:05:54 GMT Adds AlderLake platform support via new `8086/adl` config and updates SoC configs for `main` branch usage • Add config file for AlderLake platforms (`8086/adl`) • Update SoC based configs for ApolloLake, Avn, BayTrail, CherryTrail, and Denverton platforms (`8086/apl`, `8086/avn`, `8086/byt`, `8086/cht`, `8086/dnv`) Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.8.2 https://github.com/chipsec/chipsec/releases/tag/1.8.2 Tue, 01 Mar 2022 21:44:46 GMT CHIPSEC 1.8.2 adds `chipsec_util txt` to dump Intel TXT public registers and new SMM configuration bits. • Adds `txt` subcommand to `chipsec_util` with `dump` and `state` operations for Intel TXT public registers • Adds InSMM.STS bit definition and several registers in the fed30000 memory area under `8086/txt` configuration Breaking changes: • The `master` branch has been renamed to `main` Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.8.1 https://github.com/chipsec/chipsec/releases/tag/1.8.1 Tue, 01 Feb 2022 23:06:33 GMT CHIPSEC 1.8.1 adds UEFI GUID/size output, TcoCtlLock and Intel TXT register configs, and case-insensitive config search. • `access_uefispec` module now outputs Guid and Size • Added `TcoCtlLock` support for `8086/pch_495` configuration • Added registers for Intel TXT to `8086/common` and `8086/txt` configurations • Config files are found in case-insensitive mode Breaking changes: • The `master` branch has been renamed to `main` Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec https://github.com/chipsec/chipsec/releases/tag/1.8.0 https://github.com/chipsec/chipsec/releases/tag/1.8.0 Thu, 09 Dec 2021 17:26:35 GMT CHIPSEC 1.8.0 adds named flags and capabilities for MMIO/PCI/SKU discovery and UEFI Python3 migration. • Adds `--dump_unnamed_mmio` to `utilcmd.mmio_cmd` to dump unnamed MMIO regions • Computes MMCFG size dynamically from `MmioCfgBaseAddr` in `hal.mmio` instead of hardcoding values • Detects PCH based on platform vendor ID using logic in the `chipset` module • Detects presence of SKU entries via new logic in the `chipset` module • Loads XML configuration only for the current vendor, optimizing setup in the `chipset` module • Logs QWORD memory reads as 'qword' in `hal.physmem` for accurate trace output • Adds support for AMD Renoir platform with new XML configs under `1022/renoir` and descriptions in `chipsec/cfg/chipsec_cfg.xsd` • Extends PCI dump functionality with optimizations in `hal.pci` and `utilcmd.pci_cmd` • Migrates UEFI Shell environment to Python 3.6.8 via updated binaries in `__install__/UEFI/` Breaking changes: • Python2 is no longer supported for CHIPSEC 1.8.0; users must use Python3. Full history on Cyber Toolchain: https://cybertoolchain.io/tools/chipsec